As RISC-V continues to increase in popularity with engineers, the news that CPython now supports RISC-V is greatly welcomed, showing how far RISC-V has come. So what exactly is happening, and why is this important for RISC-V?
RISC-V Now Supported by CPython
Recently, CPython officially added RISC-V as a supported platform, making RISC-V a Tier 3 platform under PEP 11. While work on the port has been in development for several months, the latest release marks an important milestone for RISC-V and its potential role in future computing systems.
Getting a major programming language to support a new processor architecture is no small feat, as it requires extensive work to identify architecture-specific problems, improve build support, and test the software on real hardware. In the case of RISC-V, this has been made possible by contributions from developers and organisations working on the architecture.
In particular, the RISE Project has played an important role in the effort, providing RISC-V hardware for testing, identifying and fixing bugs, improving build support, and contributing to the wider development process. The project has also provided RISC-V buildbots for ongoing CPython development, while the Sovereign Tech Agency has provided funding to help advance the work.
Now that RISC-V has reached Tier 3 support, the next goal is to bring the architecture directly into CPython's continuous integration environment. This will be achieved through the RISE RISC-V Runners, which will allow changes to the RISC-V code to be tested automatically and help catch architecture-specific bugs before they are merged into CPython.
Furthermore, there is also the possibility of RISC-V eventually being promoted to a Tier 2 platform. This would represent a higher level of support and commitment from CPython, making RISC-V a more established part of the project's supported platforms.
However, the work does not stop at simply making CPython run on RISC-V. Developers also want to identify parts of CPython that could benefit from RISC-V-specific optimisations. This means that rather than simply ensuring compatibility, future versions could potentially take advantage of the architecture to improve Python performance on RISC-V processors.
There is still plenty of work to be done, particularly across the wider Python ecosystem. Supporting the interpreter itself is only one part of the problem, as packages, compilers, development tools and other infrastructure also need to work reliably on RISC-V. But getting CPython officially supported is an important step towards making the architecture a much more practical platform for engineers.
Why is this Important for RISC-V?
Over the past few years, RISC-V has quickly become one of the most popular processor architectures thanks to its open nature, lack of traditional IP licensing and royalties, and the freedom it gives engineers to design their own processors while remaining compatible with the wider RISC-V ecosystem.
But for all the benefits that RISC-V provides, it has one major problem: software support. Unlike ARM and x86, which have had decades to build enormous software ecosystems, RISC-V is still relatively young. This means that many software libraries, development tools, frameworks and platforms have not traditionally been designed with RISC-V in mind. As a result, engineers looking to use RISC-V can find themselves having to choose alternative software or, in some cases, simply use a different processor architecture.
This makes adopting RISC-V significantly harder than it needs to be. Even if an engineer can design the perfect RISC-V processor for a particular application, that advantage becomes less useful if the software they need cannot run on it.
But every time a major piece of software adds RISC-V support, this problem becomes a little smaller. And the addition of CPython is certainly not a small development, considering how widely Python is used across engineering, research, automation, AI and embedded development.
The same is true as more major software toolchains and development platforms begin supporting RISC-V. Each new addition makes the architecture easier to develop for, which in turn makes engineers more likely to choose it for new designs.
This creates something of a snowball effect. As more software supports RISC-V, more engineers can use RISC-V. As more engineers use RISC-V, more developers have an incentive to support it. Eventually, enough of the software ecosystem supports the architecture that choosing anything else becomes less compelling.
And this is why the CPython milestone is important. It is not going to suddenly transform RISC-V into a dominant architecture, but it removes another barrier preventing engineers from using it.
With RISC-V already gaining support across major software toolchains and development platforms, it is becoming increasingly difficult to view the architecture as a niche alternative. If this continued growth reaches a critical mass, RISC-V could very well become one of the three major processor architectures, sitting alongside ARM and Intel's x86/x64.
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